RISC-V · Oberon · 复古计算
Oberon on RISC-V — 一行命令，启动 Wirth 最后的遗产
预编译镜像 + 一键脚本 + 教学指南。不用编译，不用配置，5 分钟进入 Oberon 世界。
Why Oberon on RISC-V Matters Right Now
In the last week, a Project Oberon System port to RISC-V hit 99 points on Hacker News, sparking 16 comments from developers and educators. The original Oberon system, designed by Niklaus Wirth, is a masterpiece of minimalism — but running it requires compiling from source and wrestling with the obsolete RISC-5 architecture. That's a steep barrier for curious programmers and busy lecturers.
Existing solutions fall short: the official Oberon V5 image is tied to RISC-5, and other RISC-V teaching OSes like xv6-riscv lack Oberon's unique elegance — its garbage-collected module system, command scripts, and the sheer clarity of Wirth's design. No one offers a pre-built RISC-V Oberon image that boots in seconds. That's the gap we fill.
With RISC-V now the standard for computer architecture courses, and the HN signal showing real appetite, the timing is perfect. We've packaged the entire experience into a single run.sh script — so you can explore Wirth's legacy without touching a compiler. For educators, it's a ready-made lab for teaching processes, GC, and modularity.
How It Works
Download the Quickstart Kit
Grab the oberon-riscv-quickstart repo from GitHub. It contains the precompiled RISC-V Oberon image, a dependency-checking script, and a detailed README with a RISC-5 vs RISC-V comparison table.
Run One Command
Execute ./run.sh. The script auto-detects QEMU, downloads the image if needed, and boots the Oberon system in a terminal window. No manual configuration, no build steps — just a working system in under a minute.
Explore & Teach
Dive into the Oberon environment, run commands, and inspect the module system. For instructors, the included teaching guide offers three lab experiments covering process scheduling, garbage collection, and module design — ready for classroom use.
What You Get
开箱即用
Run ./run.sh and a fully functional Oberon system boots on RISC-V. No compilation, no dependency hell. We've pre-built the image and verified it with QEMU, so you skip the tedious setup and get straight to exploring.
教学价值
Three ready-made lab experiments for OS courses: process management, garbage collection, and module systems. Each lab includes objectives, step-by-step instructions, and discussion questions — saving lecturers hours of prep time.
RISC-V 现代指令集
Understand the evolution from Wirth's RISC-5 to today's RISC-V. Our comparison document highlights key differences in instruction encoding, register usage, and design philosophy — essential context for any serious systems student.